DLD ECE2003
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VIT University Vellore - DLD ECE2003dlmlab /2021
- Exam (elaborations) • 22 pages • 2021
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QUES2. Design the combinational logic circuit for

the following Boolean expression.

a) F1=XY+Y’Z+XYZ

X Y Z Y’ XY Y’Z XYZ F1

0 0 1 1 0 1 0 1

0 0 1 1 0 1 0 1

0 1 0 0 0 0 0 0

0 1 1 0 0 0 0 0

1 0 0 1 0 0 0 0

1 0 1 1 0 1 0 1

1 1 0 0 1 0 0 1

1 1 1 0 1 0 1 1
Exam (elaborations)
VIT University Vellore - DLD ECE2003dlmlab /2021
Last document update:
ago
QUES2. Design the combinational logic circuit for 
the following Boolean expression. 
a) F1=XY+Y’Z+XYZ 
X Y Z Y’ XY Y’Z XYZ F1 
0 0 1 1 0 1 0 1 
0 0 1 1 0 1 0 1 
0 1 0 0 0 0 0 0 
0 1 1 0 0 0 0 0 
1 0 0 1 0 0 0 0 
1 0 1 1 0 1 0 1 
1 1 0 0 1 0 0 1 
1 1 1 0 1 0 1 1
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